International Journal of Mathematical Sciences and Computing(IJMSC)
ISSN: 2310-9025 (Print), ISSN: 2310-9033 (Online)
Published By: MECS Press
IJMSC Vol.1, No.3, Sep. 2015
Design Approaches for a Novel Reversible 4-bit Comparator
Full Text (PDF, 515KB), PP.20-28
Reversible logic has shown considerable acceptance and growth in the research fields like quantum computing, Nano computing and optical computing promising lower power dissipation. This paper proposes an optimised design single-bit reversible comparator called SKAR gate with a purpose of reducing quantum cost. Besides, this novel SKAR gate is used as a single-bit reversible comparator to construct an optimised design for a four-bit reversible comparator. The paper discusses two designs, one with the use of SKAR gate and other one using a derivative gate constructed from SKAR gate. Since the reversible logic aims at reducing the value of its fundamental parameters viz. quantum cost, garbage outputs, ancillary inputs, delay and number of gates; Both the proposed designs for single-bit and four-bit reversible comparator are compared with other existing designs on the basis of elementary parameters of reversible logic.
Cite This Paper
Harpreet Singh, Chakshu Goel,"Design Approaches for a Novel Reversible 4-bit Comparator", International Journal of Mathematical Sciences and Computing(IJMSC), Vol.1, No.3, pp.20-28, 2015.DOI: 10.5815/ijmsc.2015.03.03
R. Landauer, "Irreversibility and heat generation in the computational process," IBM journal of research and development, vol. 5, issue 3, pp. 183–191, July 1961.
R. Keyes, R. Landauer, "Minimal energy dissipation in logic," IBM Journal of Research and Development, vol. 14, issue 2, pp. 153–157, Mar. 1970.
Gordon E. Moore, "Cramming More Components onto Integrated Circuits," Electronics, pp. 114–117, April 19, 1965.
F.Q. Xie, L. Nittel, T. Schimmel, et.al. , Phys. Rev. Lett. 93, 128303, Sep. 2004.
C.H. Bennett, "Logical reversibility of computation," IBM J. Res. Dev., vol. 17, issue 6, pp. 525–532, Nov. 1973.
Ri-gui Zhou, Man-qun Zhang, Qian Wu, Yan-Cheng Li, "Optimization Approaches for Designing a Novel 4-Bit Reversible Comparator," Int. J. of Theoretical Physics, 52, pp. 559-575, 2013.
M.A. Nielsen, I.L. Chuang, "Quantum Computation and Quantum Information," Cambridge University Press p. 13, Cambridge, 2000.
Ni, L., Guan, Z., Dai, X., Li,W.j.: Using new designed NLG gate for the realization of four-bit reversible numerical comparator. In: International Conference on Educational and Network Technology, pp. 254–258 (2010).
Nagamani, A., Jayashree, H., Bhagyalakshmi, H.R.: Novel low power comparator design using reversible logic gates, Indian J. Comp. Sci. Engg. 2(4), 566-574 (2011).
Thapliyal, H., Ranganathan, N., Ferreira, R.: Design of a comparator tree based on reversible logic. In:IEEE International Conference on Nanotechnology Joint Symposium, pp. 1113–1116 (2010).
A.Barenco, C.H.Bennett, R.Cleve, D.P.Divincenzo, N.Margolus, P.Shor, T.Sleator, J.A.Smolin, H.Weinfurter, Elementary gates for quantum computation, Phys. Rev. A52(5) pp. 3457–3467 (1995).
M.Mohammadi, M.Eshghi, M.Haghparast, A.Bahrololoom, Design and optimization of reversible BCD adder/subtractor circuit for quantum and nanotechnology based systems, World Appl. Sci. J. 4(6) pp.787–792, (2008).
D.Srivastava, S.N.Atluri, Computational nanotechnology: a current perspective, Comput. Modeling Eng. Sci.3(5), pp. 531–538, (2002).
J.Cervera, S.Mafe, Multivalued and reversible logic gates implemented with metallic nanoparticles and organic ligands, Chem. Phys. Chem.11, 1654–1658, (2010).
R.P.Feynman, Quantum mechanical computers, Opt. News 11, pp.11–20, 1985.
T.Toffoli, Reversible Computing. Technical Memo MIT/LCS/TM-151, MIT Lab. for Computer Science, 1980.
E.Fredkin, T.Toffoli, Conservative logic, Int. J. Theor. Phys. 21, pp. 219–253 (1982).
A.Peres, Reversible logic and quantum computers, Phys. Rev. A32, pp. 3266–3276, (1985).